aag 212 2 31 1 179
2
4
6 1
8 191
10 199
12 207
14 215
16 223
18 231
20 239
22 247
24 255
26 263
28 271
30 279
32 287
34 295
36 303
38 311
40 319
42 327
44 335
46 343
48 351
50 359
52 367
54 375
56 383
58 391
60 399
62 407
64 415
66 424
184
68 66 6
70 64 6
72 62 6
74 60 6
76 58 6
78 56 6
80 54 6
82 52 6
84 50 6
86 48 6
88 46 6
90 44 6
92 42 6
94 40 6
96 38 6
98 36 6
100 34 6
102 32 6
104 30 6
106 28 6
108 26 6
110 24 6
112 22 6
114 20 6
116 18 6
118 16 6
120 14 6
122 12 6
124 8 6
126 10 6
128 126 124
130 128

... [truncated 2.8 kB]

rr;
  reg [29:0] counter;

  assign err = (counter == 30'b111111111111111111111111111111) ? 1 : 0;

  initial
  begin
    counter = 30'b0;
  end
  always @ (posedge clk)
  begin
    if(stay)
      counter = counter;
    else if(counter == 30'b011111111111111111111111111111 && controllable_reset)
      counter = 0;
    else
      counter = counter + 1;
   end
endmodule
-------------------------------
#!SYNTCOMP
STATUS : unknown
SOLVED_BY : 0/8 [SYNTCOMP2014-RealSeq]
SOLVED_IN : 0.0 [SYNTCOMP2014-RealSeq]
#.