aag 548 32 54 1 462
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66 1
68 30
70 10
72 980
74 58
76 996
78 998
80 1000
82 52
84 12
86 1026
88 50
90 1028
92 14
94 56
96 1037
98 1038
100 48
102 16
104 1040
106 46
108 18
110 60
112 44
114 20
116 64
118 1042
120 54
122 1044
124 1046
126 42
128 22
130 2
132 1048
134 1052
136 36
138 40
140 24
142 4
144 6
146 1062
148 1070
150 1082
152 1092
154 38
156 1094
158 26
160 34
162 383
164 28
166 1096
168 8
170 32
172 62
852
17

... [truncated 46.8 kB]

ble_BtoR_REQ1;
   reg_i_FULL =  i_FULL;
   reg_i_nEMPTY =  i_nEMPTY;
   reg_controllable_ENQ =  controllable_ENQ;
   reg_controllable_DEQ =  controllable_DEQ;
   reg_controllable_SLC0 =  controllable_SLC0;
   reg_controllable_SLC1 =  controllable_SLC1;
   reg_controllable_SLC2 =  controllable_SLC2;
   reg_controllable_SLC3 =  controllable_SLC3;

 end
endmodule

-------------------------------
#!SYNTCOMP
STATUS : realizable
SOLVED_BY : 6/8 [SYNTCOMP2014-RealSeq]
SOLVED_IN : 1.80811 [SYNTCOMP2014-RealSeq]
#.